As one of the capacitor used in semiconductor devices is a capacitor using multi-level interconnection structures. In such inter-interconnection capacitor, neighboring interconnection patterns form a pair of electrodes, and the inter-layer insulating film between them forms a capacitor dielectric film.
The following are examples of related: Japanese Laid-open Patent Publication No. 2003-249559, and Japanese Laid-open Patent Publication No. 2004-221498.
Accompanying the downsizing, etc. of the devices, the capacitance per a unit area of the inter-interconnection capacitor is required to be increased. The most effective means for increasing the capacitance of the inter-interconnection capacitor is to decrease the distance between the interconnections.
However, a minimum space between the interconnections is limited by photolithographic technology, and a minimum processing dimension decided by the design rules for a generation of the device is the minimum space between the interconnection patterns. Accordingly, it has been difficult to increase the capacitance of the inter-interconnection capacitor by decreasing the space between the interconnections to a space which exceeds a minimum processing dimension of the photolithography.